Lazy scheduling and direct process switch — merit or myths?
Authors
Kevin Elphinstone, David Greenaway and Sergio Ruocco
School of Computer Science and Engineering
University of New South Wales
Sydney 2052 Australia
NICTA, Sydney,
Australia
Abstract
The L4 microkernel, like many first and second generation microkernels, was designed to maximise best-effort performance. One component of its functionality critical to overall system performance is its interprocess communication primitive. L4 uses two techniques to minimise communication costs: direct process switching and lazy queue management. These techniques improve performance at the expense of real-time predictability of the scheduler. Now that L4 is being adopted in the embedded space, which features real-time requirements, we must determine if there is continued merit in using the optimisations. In this paper we quantitatively analyse the two optimisations using different kernel implementations and measure the performance improvements of the optimisations directly, and indirectly using the Re-aim benchmark suite. We find that the system-level performance improvements are marginal for this Unix-like workload.
BibTeX Entry
@inproceedings{Elphinstone_GR_07,
author = {Kevin Elphinstone and David Greenaway and Sergio Ruocco},
title = {Lazy Scheduling and Direct Process Switch --- Merit or Myths? },
booktitle = {Proceedings of the 3rd Workshop on Operating System Platforms for Embedded Real-Time Applications},
address = {Pisa, Italy},
year = {2007},
month = {Jul}
}