Performance of address-space multiplexing on the Pentium

Authors

Volkmar Uhlig, Uwe Dannowski, Espen Skoglund, Andreas Haeberlen and Gernot Heiser

University of Karlsruhe
Germany

The University of New South Wales
Sydney 2052
Australia

Abstract

This paper presents an analysis of the performance potential and limitation of the so-called small-space scheme, where several logical address spaces are securely multiplexed onto a single hardware address space. This can be achieved on the IA-32 architecture by using the segment registers to relocate address spaces transparently to the applications.

Our results show that the scheme can provide significant performance improvements in cases where processes with small working sets interact frequently, as is often the case in client-server applications, and particularly in microkernel-based systems. We also investigate how potentially costly revocation of mappings can be prevented by clustering communicating processes.

BibTeX Entry

  @techreport{Uhlig_DSHH_02,
    author           = {Volkmar Uhlig and Uwe Dannowski and Espen Skoglund and Andreas Haeberlen and Gernot Heiser},
    title            = {Performance of Address-Space Multiplexing on the {Pentium}},
    number           = {2002-1},
    note             = {\url{http://i30www.ira.uka.de/research/documents/l4ka/smallspaces.pdf}},
    year             = {2002},
    institution      = {Computer Science Department, University of Karlsruhe}
  }

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